Project

General

Profile

Front-end information » History » Version 8

Michael Wallbank, 10/18/2018 10:44 AM

1 1 Michael Wallbank
h1. Front-end information
2 1 Michael Wallbank
3 8 Michael Wallbank
h2. VME crate
4 8 Michael Wallbank
5 8 Michael Wallbank
As user novadaq, the directory
6 8 Michael Wallbank
<pre>
7 8 Michael Wallbank
/home/nfs/novadaq/
8 8 Michael Wallbank
</pre>
9 8 Michael Wallbank
on novabeamlinedaq00 contains some useful utilities to communicate with the hardware.  All CAEN provided software.
10 8 Michael Wallbank
11 8 Michael Wallbank
Run CAEN upgrader GUI:
12 8 Michael Wallbank
<pre>
13 8 Michael Wallbank
./CAENUpgrader-1.6.3/CAENUpgraderGUI/CAENUpgraderGUI
14 8 Michael Wallbank
</pre>
15 8 Michael Wallbank
16 8 Michael Wallbank
Run CAEN V1742 digitizer (outside of DAQ):
17 8 Michael Wallbank
<pre>
18 8 Michael Wallbank
wavedump-3.8.2/bin/wavedump /etc/wavedump/WaveDumpConfig_X742.txt
19 8 Michael Wallbank
</pre>
20 8 Michael Wallbank
21 8 Michael Wallbank
Run CAEN VME module:
22 8 Michael Wallbank
<pre>
23 8 Michael Wallbank
./CAENVMELib-2.50/sample/CAENVMEDemo V2718 <base address, in hex (beginning 0x)> <link>
24 8 Michael Wallbank
</pre>
25 8 Michael Wallbank
With this utilities, one can set the base address (option 2), set a register (option 1) and read etc.
26 8 Michael Wallbank
27 8 Michael Wallbank
CAEN base addresses:
28 8 Michael Wallbank
Board     Address
29 8 Michael Wallbank
1742       3211
30 8 Michael Wallbank
2495      3210
31 8 Michael Wallbank
1495       0100
32 8 Michael Wallbank
33 1 Michael Wallbank
h2. V1742 Digitizer
34 3 Michael Wallbank
35 3 Michael Wallbank
h3. Post-Trigger
36 3 Michael Wallbank
37 3 Michael Wallbank
The V1742 has a register named @POST_TRIGGER@. This value is a percentage of the readout that is to be after the trigger. There is an implicit latency of around 40 ns, so in reality, the Post-Trigger percentage sets the percentage of the readout that will be *after* 40 ns past the trigger.
38 3 Michael Wallbank
39 3 Michael Wallbank
For an unknown reason, only certain values of @POST_TRIGGER@ are accepted and must be found by trial and error.
40 3 Michael Wallbank
41 3 Michael Wallbank
h3. Known working values
42 3 Michael Wallbank
43 3 Michael Wallbank
* 0
44 3 Michael Wallbank
* 20
45 3 Michael Wallbank
* 45
46 4 Michael Wallbank
47 4 Michael Wallbank
h2. MWPC Controller
48 4 Michael Wallbank
49 4 Michael Wallbank
Details:
50 4 Michael Wallbank
* Hardware address: 00.80.55.ee.00.01
51 4 Michael Wallbank
* IP address (programmed onto board!): 131.225.176.70
52 4 Michael Wallbank
* Name: ftbfwc03
53 4 Michael Wallbank
* CD system reference number: S22041
54 4 Michael Wallbank
* CD equipment ID number: 557912
55 4 Michael Wallbank
56 4 Michael Wallbank
Log in:
57 4 Michael Wallbank
58 4 Michael Wallbank
<pre>
59 4 Michael Wallbank
telnet ftbfwc03 <port>
60 4 Michael Wallbank
</pre>
61 4 Michael Wallbank
62 4 Michael Wallbank
Ports (according to "here":https://cdcvs.fnal.gov/redmine/projects/ftbfwirechamberdaq/wiki/Wire_Chamber_DAQ_Developer)
63 4 Michael Wallbank
* 5000 - daq apps
64 4 Michael Wallbank
* 5001 - emergency access
65 4 Michael Wallbank
* 5002 - telnet sessions
66 5 Michael Wallbank
67 7 Michael Wallbank
[[MWPC Configuration and Registers]]