DAQ cabling¶
The required cabling for the Beamline DAQ to work. Documented here since I need to change a NIM bin, but useful to document anyway!
Reset fan-out (logic)¶
- Reset signal, nominally $00
- Goes to Start gate on DAQ gate generator
- Goes to bottom port on D connectors in V1495
End fan-out (logic)¶
- End signal, nominally $00+T
- Goes to Stop gate on DAQ gate generator
- Goes to 0 port on V1742
Gate fan-out (logic)¶
- Comes from Gate on DAQ gate generator
- Goes to 1 port on V1742
- Goes to SIN on V1742
Trigger fan-out (logic)¶
- Comes from Gate on Trigger gate generator
- Goes to TR0 on V1742
- Goes to MWPC controller trigger in
- Goes to TDU
- Goes to ACNET scalar
DAQ gate generator¶
- Reset Start, End Stop, Gate output to fan-out
- Infinite width, controlled by Start and Stop
Trigger gate generator¶
- Trigger output from V1495 input to Start
- Gate output to fan-out
- Not Gate output to trigger board
- Blank input from Switchyard gate generator
- 10us width, tuned exactly
Switchyard gate generator¶
- Switchyard start to Start input (nominally $30)
- Switchyard end to Stop input (nominally $36)
- NIM output to trigger board
- Not NIM output to Blank on Trigger gate generator
- Infinite width (LATCH), controlled by Start and Stop
ToF¶
- All 12 signals fanned out: 0 baseline, normal signal
- All 12 signals to digitizer
- All 12 signals discriminated: threshold -0.3 V, width 50 ns
- 3/4 coincidence for US, DS-PMT, DS-SiPM separately (width 30 ns (upstream), 50 ns (downstream))
- DS-SiPM 3/4 coincidence sent to trigger board
- US-PMT 3/4 has 64 ns cable delay added
- US-PMT 3/4 discriminated (threshold -0.475 V, width 10 ns) and sent to TOFPrompt coincidence
- US-PMT 3/4 discriminated (threshold -3 V, width 90 ns) and sent to trigger board and TOFSlow coincidence
- DS-PMT 3/4 discriminated (threshold -10 V, width 10 ns) and sent to TOFPrompt and TOFSlow coincidence
- DS-PMT 3/4 discriminated (threshold -0.35 V, width 50 ns) and sent to trigger board
- TOFPrompt and TOFSlow have 2-fold coincidences; output (50 ns) sent to trigger board
Wire Chambers¶
- Signal from TDCs are combined in coincidence: (X OR X) AND (Y OR Y)
- Output from each of the OR coincidences 30 ns
- Output from each of the AND coincidences 40 ns
- 4 signals (one for each chamber) sent to trigger board