1. General status updates/Schedule
Eric -- working on getting pilot system up and running. Issue w/daq03. All nodes are SL7 (except DAQ02). Cleaned up rack wiring.
Is offline going to move to SL7 exclusively?
Rick -- working with Sten on new DTC version. Bug fixes back and forth. We can receive his packets. Sten misses some received packets. Sten has Spartan VI FPGA - link elastic buffer not working.
Gennadiy -- wondering if we can start using artdaq_database. Daq11 has 3 SSD drives, one can be taken for db. Re: trigger optimization, will look at MVA.
Ron -- looking at Tomo’s issue.
Tomo -- able to compile is SL7 .. made offline ups package.. And run in online in simulation mode (with latest D Brown input source). ISSUE -- communication with DTC intermitent software issue.
Bertrand -- we're down to ~10-12 ms for the full track trigger, and around 4-5 for the calo-track trigger, with a few potential improvements in the pipeline
2. Rack CRR status
Oct 17 is Tuesday.. 2 hours.
3. Internal review preparation status
On October 26 (6 weeks from now), from 1p to 3p (our normal bi-weekly time slot), I would like to have an internal "TDAQ Production Phase Intermediate Design Review" to satisfy the following milestone activity:
TDAQ Activity: 47509.1.3.001160
Milestone Name: T5 ‐ Production System Design Intermediate Progress Review Complete
Baseline Date: 7/21/2017
Milestone Description: Review Production system design progress.
My interpretation of this activity (and I'm open to feedback) is that we should internally (i.e. among TDAQ developers) review the design (i.e. block diagrams and feature lists) and design implementation progress (i.e. implementation status of the blocks/features, and/or demo) for these categories:
- DTC Firmware [Rick]
- CFO Firmware [Rick, Ryan]
- artdaq Software -- DTC interface [Eric, Ron]
- artdaq Software -- Event Building [Eric, Ron]
- EPICS DCS Software [Glenn]
- web-DCS Software [Ryan]
4. FPGA Event Building progress/plans
New DTC release event building untested.
5. online Trigger Processing (including through DTC) progress/plans (highest priority)
Tomo is going to dive into VHDL for preprocessing
6. Rack protection & slow controls progress/plans (can we monitor PDU and Mu2ebuilding?)
Dcs nodes public and private networks connected. IPMI probably not connected. PDU management interfaces.