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11-May-2017

Agenda:
- General status updates
- FPGA Event Building progress/plans
- Vertical Slice Test Stand progress/plans
- Rack protection slow controls progress/plans
- Online art Filter progress/plans

Gennadiy -- understanding how time is spent in first element of trigger. “Straw Hit” .. using assemlby reading of processor clock counts. (doing nothing is 100 “instructions”). 2-4K digis.. 500 instructions to do 1 digi.. Then to determine of the digi is a “hit” .. 50 instructions…

Rick -- DTC code. 10GbE event builder.. ClockFix is in. DetectorEmulation “playback mode” is broken.

Eric -- mu2edaq01 has 2TB cloned. Looked into backup services, and didn’t see many options.