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01-Aug-2019

Ron -- write register was causing kernel crash. Type declaration goes to mu2e_io_mm.h dtc_addr_t ⇒ uint16_t .. will need to compile and reload kernel. .. mrb z perhaps. Ron confirmed that kernel gets rebuilt.. Install still needs to happen (maybe magic happens).

Also logging trace/message facility. Should be possible to setup the configuration to cout and message_facility.. We should try to coherently merge

Glenn -- attempting to get something running again on FCC3 test stand. Wants to try the “new” archiver. .. wants to make clear how to make our own channel access server. “Normally” is the hardware daq is the channel access server.

John --

Rick -- Testing timing cards of 88, .. 1 out of 7, next batch 2 bad out of 10.. And now 3 our of 50. Lei/CRV came by with update for CRV ROC - new configuration scheme. Have not tried timing interface for CRV. DTC will output timing signals out the RJ45 jack.

Ryan -- POs are out except req is sole sourced cassettes.. Fireflies are very delicate to install (says Rick).. Rick and John should install. Avoid multiple insertions. DTC knows how to read the id of the Firefly. John has a spreadsheet going and keeping track of tests. Racks should be reviewed for operational readiness.

Rick and John point out we need to cutout the back panel of servers so timing card can fit out. We may be able to specify a bigger opening. Consider specifying the mother board is same batch.

Greg -- Has new italian student, Micol. Will be here for 2 months. Proposing to write document on ROC core firmware.

Rick has implemented the 4byte marker.

Rick, John, Vivian noticed blown capacitors on DTC.. power bypass caps. Checked the voltage rating -- listed as 16V .. 12V nominally but not regulated well.