Project

General

Profile

Communicating with the wire chambers » History » Version 28

Jason St. John, 04/07/2016 12:34 AM

1 1 Michael Kordosky
h1. Communicating with the wire chambers
2 1 Michael Kordosky
3 19 Jason St. John
h2. How to do a hard reboot of the WC controller
4 1 Michael Kordosky
5 1 Michael Kordosky
If the wire chamber controller at ftbfwc02 starts refusing connections it may need a reboot:
6 1 Michael Kordosky
7 24 Roberto Acciarri
* if taking a run, stop the DAQ before rebooting the wire chambers
8 1 Michael Kordosky
* from a browser go to http://ftbf-pdu00.fnal.gov
9 28 Jason St. John
* User: admin   Password: <written on a note on the right side of the central monitor at ROC West, or on the board at MCenter>
10 1 Michael Kordosky
* Navigate to this screen:
11 1 Michael Kordosky
12 18 Will Foreman
!ftbfpdu00_control_screen2.png!
13 1 Michael Kordosky
14 18 Will Foreman
* click on "Outlet 6" and then choose "Reboot Immediate" from the drop-down menu at the top, and click "Next" at the bottom (you will be asked to confirm this decision in the next screen)
15 1 Michael Kordosky
* The state will change to "Off" but will be pending. Wait a little while and refresh the screen or log back in. The WC should be back on.
16 24 Roberto Acciarri
* Wait a couple of minutes before starting a new run
17 12 Michael Kordosky
18 15 Will Flanagan
19 26 Jason St. John
h2. The telnet interface 
20 1 Michael Kordosky
21 20 Flor de maria Blaszczyk
This is experts only! If the problem persists after doing the hard reboot described in the previous section, do a hard reset from the telnet interface.
22 1 Michael Kordosky
23 1 Michael Kordosky
* telnet ftbfwc02.fnal.gov 5000
24 16 Will Flanagan
** also 5001 - 5003 are available
25 20 Flor de maria Blaszczyk
26 20 Flor de maria Blaszczyk
After issuing this command, the prompt will appear blank. Type your command in that blank space.
27 20 Flor de maria Blaszczyk
For a hard reboot, do:
28 20 Flor de maria Blaszczyk
* FF
29 20 Flor de maria Blaszczyk
30 21 Flor de maria Blaszczyk
If it worked, you will be kicked out. You can re-telnet if you need to perform other operations.
31 20 Flor de maria Blaszczyk
Other useful commands:
32 12 Michael Kordosky
33 12 Michael Kordosky
* "help" prints the top level help menu. h1,h2,h3 also print help menus
34 12 Michael Kordosky
35 12 Michael Kordosky
* "p0" gives a synopsis of the last spill, like so:
36 12 Michael Kordosky
37 12 Michael Kordosky
<pre>
38 12 Michael Kordosky
p0
39 12 Michael Kordosky
Controllers Spill Data Header  (5653mS SpillGate)
40 12 Michael Kordosky
 TotalWrdCnt  = 00009F89  (40841 D)
41 12 Michael Kordosky
 SpillCounter = 00000001  (1 D)
42 12 Michael Kordosky
 RTC Year/Mon = E08       (14/08)
43 12 Michael Kordosky
 RTC Day/Hr   = C0F       (12/15)
44 12 Michael Kordosky
 RTC Min/Sec  = F14       (15/20)
45 12 Michael Kordosky
 Trigger Cnt  = 00000110
46 12 Michael Kordosky
 Status Bits  = 0
47 12 Michael Kordosky
 Link Status  = 0
48 12 Michael Kordosky
           TDC Spill Hdrs (1 <= 16)
49 12 Michael Kordosky
 Input   Words       TDCnum   TrgCnt      Status
50 12 Michael Kordosky
   1     00000A9E    0001     00000110    0008
51 12 Michael Kordosky
   2     00000A05    0002     00000110    0008
52 12 Michael Kordosky
   3     00000A2E    0003     00000110    0008
53 12 Michael Kordosky
   4     00000A22    0004     00000110    0008
54 12 Michael Kordosky
   5     000009D2    0005     00000110    0008
55 12 Michael Kordosky
   6     00000A89    0006     00000110    0008
56 12 Michael Kordosky
   7     000009E0    0007     00000110    0008
57 12 Michael Kordosky
   8     00000A32    0008     00000110    0008
58 12 Michael Kordosky
   9     000009D3    0009     00000110    0008
59 12 Michael Kordosky
  10     000009C8    000A     00000110    0008
60 12 Michael Kordosky
  11     000009D3    000B     00000110    0008
61 12 Michael Kordosky
  12     000009B0    000C     00000110    0008
62 12 Michael Kordosky
  13     000009C2    000D     00000110    0008
63 12 Michael Kordosky
  14     000009CE    000E     00000110    0008
64 12 Michael Kordosky
  15     000009B9    000F     00000110    0008
65 12 Michael Kordosky
  16     000009B8    0010     00000110    0008
66 12 Michael Kordosky
</pre>
67 12 Michael Kordosky
68 12 Michael Kordosky
* "hc n string" with n=1-16 writes string to TDC n. If n=0 then all TDCs are written to.
69 12 Michael Kordosky
* "hc 0 rdi 0"  writes the command "rdi 0" to all TDCS.  
70 12 Michael Kordosky
** The rdi command is documented in the help menu:  RDI adr c   Read/and Incr FPGA Addr(H), c=WrdCnt(D)
71 12 Michael Kordosky
** The output is:
72 12 Michael Kordosky
<pre>
73 12 Michael Kordosky
hc 0 rdi 0
74 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
75 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
76 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
77 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
78 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
79 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
80 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
81 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
82 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
83 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
84 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
85 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
86 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
87 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
88 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
89 12 Michael Kordosky
   7   27   ac   a0 ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
90 12 Michael Kordosky
</pre>
91 13 Michael Kordosky
** The rows of this readout correspond to the different TDCs.
92 13 Michael Kordosky
** The columns of this readout have a well defined meaning. They correspond to registers in the "FTBF TDC FPGA Register Map" document found at [[TDC Readout Documentation]].  For example:
93 13 Michael Kordosky
*** The first column is the Control and status register - 0x00. 
94 13 Michael Kordosky
*** The second is the gate width register - 0x01. 
95 13 Michael Kordosky
*** The third is the time stamp counter initial value (a.k.a. clock adjust) - 0x03. 
96 13 Michael Kordosky
*** The forth column is the Hit Pipeline Delay Register - 0x03. A value of a0 = 160 and the unit is 9.416ns (RF period / 2) so the delay is 1,506ns.
97 14 Michael Kordosky
98 14 Michael Kordosky
h3. Adjusting the Hit Pipleline Delay
99 14 Michael Kordosky
100 14 Michael Kordosky
* We want to adjust the pipeline to take out about 200ns of delay. Thus we want to reduce the register value by 21 going from 0xa0=160 to 139=0x8B
101 14 Michael Kordosky
* The command is "HC 0 WR 3 8B"
102 14 Michael Kordosky
<pre>
103 14 Michael Kordosky
HC 0 WR 3 8B
104 14 Michael Kordosky
105 14 Michael Kordosky
hc 0 rdi 0
106 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
107 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
108 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
109 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
110 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
111 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
112 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
113 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
114 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
115 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
116 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
117 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
118 14 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
119 1 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
120 1 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380 
121 1 Michael Kordosky
   7   27   ac   8b ffff ffff ffff ffff  380  380  380  380  380  380  380  380
122 1 Michael Kordosky
</pre>
123 1 Michael Kordosky
124 1 Michael Kordosky
* Then, one needs to store the new setting in flash : "HC 0 DSAV 1"
125 1 Michael Kordosky
<pre>
126 1 Michael Kordosky
HC 0 DSAV 1
127 1 Michael Kordosky
Setup saved to ATMEL Page 1
128 1 Michael Kordosky
Setup saved to ATMEL Page 1
129 1 Michael Kordosky
Setup saved to ATMEL Page 1
130 1 Michael Kordosky
Setup saved to ATMEL Page 1
131 1 Michael Kordosky
Setup saved to ATMEL Page 1
132 1 Michael Kordosky
Setup saved to ATMEL Page 1
133 1 Michael Kordosky
Setup saved to ATMEL Page 1
134 1 Michael Kordosky
Setup saved to ATMEL Page 1
135 1 Michael Kordosky
Setup saved to ATMEL Page 1
136 1 Michael Kordosky
Setup saved to ATMEL Page 1
137 1 Michael Kordosky
Setup saved to ATMEL Page 1
138 1 Michael Kordosky
Setup saved to ATMEL Page 1
139 1 Michael Kordosky
Setup saved to ATMEL Page 1
140 14 Michael Kordosky
Setup saved to ATMEL Page 1
141 14 Michael Kordosky
Setup saved to ATMEL Page 1
142 14 Michael Kordosky
Setup saved to ATMEL Page 1
143 14 Michael Kordosky
</pre>
144 25 Jason St. John
145 25 Jason St. John
h2. Looking at the data, Beam Study *OBSOLETE*
146 25 Jason St. John
147 25 Jason St. John
ssh ftbflx01
148 25 Jason St. John
setup cern
149 25 Jason St. John
cd ~ftbf_user/experiments/mc7/TkRec
150 25 Jason St. John
paw
151 25 Jason St. John
exec runtk