Feature #23118
No identification of bad bias or mux on display
Status:
New
Priority:
Normal
Assignee:
-
Start date:
08/14/2019
Due date:
% Done:
0%
Estimated time:
Description
The table of voltages shows values but not pass/fail status of tests.
Some information is given when attempt is made to save, but it is often incomplete. (Which FPGA?)